Abstract:The synchronization trigger signal of the current decoder is easily affected by noise during the modulation process, causing signal distortion and blurring of the decoded image details. To enhance image clarity, a decoder synchronous trigger signal modulation technology for high-definition image transmission is proposed. In the designed FPGA platform, a concurrency control mechanism is adopted to ensure that SRAM storage modules avoid data conflicts and inconsistencies during multitasking access. And combine the power carrier module and PLC network transmitter to ensure the synchronization and consistency of the system. Addressing SRAM based on 16 × 16 parallel accumulator output and obtaining baseband signals through in-phase and orthogonal frequency operations. At the same time, combining the DDS digital synthesis theory to achieve symbol rate free control, on this basis, a 5-channel decoder is used to synchronously trigger signal modulation to map the transmitted information bits into a synchronous transmission sequence. By applying oscillation current and using data fitting identification methods to construct a transfer function, the modulation signal is adjusted to improve distortion and attenuation in transmission, thus completing signal modulation. The experimental results show that the modulation errors of BPSK, QPSK, and FSK signals using this technology are 1dB, 1dB, and 2dB, respectively. The impact on image decoding is relatively low, and high-definition images with clear details can be obtained.
