基于FPGA的多串口中断管理器设计

Design of Multichannel Serial Port Interrupt Manager Based on FPGA

摘要:

为了解决飞控计算机与多个不同周期和数据帧大小的外部设备串口合理传输数据的问题,在Field Programmable Gate Array (FPGA)中设计了一款多串口中断管理器,其包含有寄存器控制模块、中断控制模块和串口控制模块；为每一个外部设备设计了发送和接收的First in, First out(FIFO)模块来缓存串口数据,同时根据不同外部设备的数据收发需求,设计了五种合理的中断类型来触发飞控计算机的中断,包括接收数据就绪中断、发送FIFO空中断、数据状态错误中断接收超时中断和发送超时中断；通过总线与该多串口中断管理器通信,进一步实现与不同类型外部设备的合理交互。通过对系统进行仿真和实际测试,表明该系统能实现完整的多路串口各类型中断管理功能。

Abstract:

To address the challenge of efficient data transmission between the flight control computer and multiple external devices with varying data frame sizes and time cycles, a multi-serial port interrupt manager is designed using a Field Programmable Gate Array (FPGA). This manager comprises a register control module, an interrupt control module, and a serial port control module. For each external device, First in, First out(FIFO) modules are designed for both transmission and reception to buffer serial port data. Additionally, five distinct interrupt types are devised based on the data transmission and reception requirements of different external devices. These include the interrupt for data reception readiness, FIFO empty interrupt for transmission, data status error interrupt, reception timeout interrupt, and transmission timeout interrupt. Through bus communication with the multi-serial interrupt manager, it further realizes reasonable interaction with different types of external devices. Simulation and practical testing of the system demonstrate its capability to effectively manage multiple serial ports with different interrupt types. The results affirm that the system successfully achieves comprehensive interrupt management functionality.