Abstract:A multi-channel analog acquisition module which can work as a HART master is designed based on the CPU+FPGA architecture. The CPU and the FPGA of the acquisition module communicates with each other through the PCIe bus. The FPGA controls eight analog acquisition channels through the isolated SPI bus and communicates with two protocol conversation chips. The chip converts one-channel SPI to four-channel UART and communicates with four-channel HART MODEMs through the UART interface. One HART channel corresponds with one analog acquisition channel. HART signals are superimposed with the analog signals between the filtration module and the protection circuit through the coupling module. The analog input signals pass through the channel protective circuit and the filtration module and reach the analog conversion module where analog signals are converted into digital signals. The FPGA and the protocol conversion chips help realize the parallel processing of eight analog acquisition channels and the concurrent working of HART channel serial communication. There are two separated threads in the CPU, each responsible for four channel HART communication which sends and receives signals periodically. The concurrent working method improves the speed of analog acquisition, reduces the delay time and increases the efficiency of the HART communication. The isolated-channel design reduces the impact of fault channels on others, and enhances the reliability of the module. The module can measure 4~20ma current signal and ±5V, ±10V voltage signal, with acquisition accuracy of 0.1%. The module has 250ohms sampling resistance under current mode, and isolation voltage between channels up to 1000VDC.
