基于ZYNQ的高清图像显示及检测系统设计

Design of high-definition image display and detection system based on ZYNQ

摘要:

针对当前基于ARM 和DSP的嵌入式图像处理系统前端采集速度慢和图像处理算法不易加速的缺点,设计了一种基于HDMI接口的全高清(分辨率1920×1080)实时视频采集与图像处理系统。采用500万像素级别CMOS摄像头作为前端数据源,主芯片内部采用ARM+FPGA的异构架构,兼备FPGA的并行处理能力与 ARM处理器任务调度功能。基于AXI协议设计了自定义数据存储传输的IP核,实现了处理速度与带宽最大化。利用HLS工具将图像预处理算法快速打包生成IP核,在FPGA中实现图像算法的硬件加速,完成图像处理系统平台原型机的设计。与传统的PC机和相机的机器视觉平台相比,该系统运行平均耗时在10ms以内,实时检测效果令人满意,有效解决了低功耗与高数据带宽和处理速度之间的矛盾,为后端结果分析和边缘加速提供了良好支持。

Abstract:

Aiming at the shortcomings of the current ARM and DSP-based embedded image processing system, the front-end acquisition speed is slow and the image processing algorithm is not easy to accelerate, a full HD (resolution 1920×1080) real-time video acquisition and image processing based on the HDMI interface is designed system. A 5 million pixel CMOS camera is used as the front-end data source. The main chip uses an ARM+FPGA heterogeneous architecture, which has both the parallel processing capability of the FPGA and the task scheduling function of the ARM processor. Based on the AXI protocol, a custom data storage and transmission IP core is designed to maximize processing speed and bandwidth. Use the HLS tool to quickly package the image preprocessing algorithm to generate an IP core, implement hardware acceleration of the image algorithm in FPGA, and complete the design of the image processing system platform prototype. Compared with the traditional PC and camera combined machine vision platform, the system takes an average of less than 10ms to run, and the real-time detection effect is satisfactory, effectively solving the contradiction between low power consumption and high data bandwidth and processing speed. Provides good support for back-end result analysis and edge acceleration.