一种适于Sigma-Delta ADC的高增益放大器的设计

A Design of a High-Gain Amplifier for Sigma-Delta ADC

摘要:

设计了一种应用增益增强技术和斩波稳定技术的全差分折叠式共源共栅运算放大器。整体放大器采用了折叠式共源共栅结构,主运算放大器采用增益增强技术和开关电容共模反馈,两个辅助运算放大器采用连续时间共模反馈以实现高增益。此外,还采用了斩波稳定技术,在放大器的前后加入斩波开关,达到了滤除低频噪声的效果。在基于SMIC 55nm工艺库,电源电压3.3V下,在Cadence平台利用Spectre进行模拟仿真,仿真结果表明：等效输出噪声低频处的噪声被滤除,运算放大器的增益为116.9dB,相位裕度为72°,单位增益带宽为355MHz,能够使放大器应用于低频域,能够满足Sigma-Delta调制器对于音频频域的设计需要。

Abstract:

A fully differential operational-amplifier used in a high gain ADC is designed．This op-amp adopts folded cascade to achieve high gain while the main op-amp uses gain-enhancement technique and switch capacitor common-mode feedback and the two auxiliary op-amps use continuous time common-mode feedback．In addition,it also uses the chopper stabilization,adding the chopper switch to the front and rear structures of the amplifier,so as to achieve the effect of filtering out the low-frequency noise. Based on SMIC 55nm,3.3V process,the simulation results show that the low-frequency noise of output noise is filtered out. the DC-gain of op-amp is 116.9dB,phase margin is 72°and unity-gain bandwidth is 355MHz,that can make the op-amp suitable for low-frequency domain and meet the needs of Sigma-Delta’s modulator design of audio domain．