基于Nios II的井下静态随机存取存储器管理

Static Random-Access Memory management based on Nios II

摘要:

针对测井仪器中高速数据缓存的问题，提出了一种基于Nios II的静态随机存储器（Static Random-Access Memory，SRAM）控制器的IP核的设计方法，详细介绍了IP核的设计和实现过程并基于一定的硬件平台对SRAM控制器IP核的稳定性进行了测试。测试结果表明，所设计的SRAM控制器IP核能够在高温环境下实现对SRAM的有效管理而且通过修改配置参数就可应用在不同位宽和容量的SRAM上且运行稳定。该设计不仅实现测井仪器中高速数据缓存的管理，也提供了一套SRAM选型测试系统。另外设计介绍的可编程片上系统（System-on-a-Programmable-Chip，SOPC）开发流程对其它SOPC系统开发也具有一定的参考价值。

Abstract:

Aiming at the problem of high speed data cache in logging tool, proposes a design method of IP core of SRAM controller based on Nios II, introduces the design and implementation process of IP core in detail, and tests the stability of IP core of SRAM controller based on certain hardware platform. The test results show that the designed SRAM controller IP core can effectively manage SRAM in high temperature environment and can be applied to SRAM with different bit widths and capacities by modifying configuration parameters and running stably. The design not only realizes the management of high speed data cache in logging tool, but also introduces a set of SRAM selection test system. In addition, the development process of SOPC system introduced in the design has certain reference value for the development of other SOPC systems.