基于FPGA的遥测系统数据存储器控制模块设计

Design of Data Memory Control Module for Telemetry System Based on FPGA

摘要:

针对当前遥感系统存储器早期控制模块存在控制效率低的问题，提出了基于FPGA的遥测系统数据存储器控制模块设计。根据模块总体设计方案，设计模块结构和功能。其中模块结构是由自体测试接口模块、低速读写控制模块、高速流读写控制模块组成的，以SATA2.0接口为存储介质设计控制器，构建不同帧，进行数据间传输转换。设计稳态触发接口电路，达到高速流读写控制触发目的。根据软件主流程，在组合逻辑中插入寄存器使逻辑延迟，实现FPGA时序控制。采用分时操作方法，对命令层中控制器读写模式进行控制，实现传输层完成帧的控制收发。由实验结果可知，该模块最高控制效率优于传统模块，为数据高效存储提供支持。

Abstract:

Aiming at the problem that the early control module of the remote sensing system memory has low control efficiency, the design of the data memory control module of the telemetry system based on FPGA is proposed. The module structure and functions are designed according to the overall design of the module. The module structure is composed of an auto test interface module, a low-speed read/write control module, and a high-speed stream read/write control module. The SATA2.0 interface is used as a storage medium design controller to construct different frames for data transfer conversion. The steady-state trigger interface circuit is designed to achieve the purpose of high-speed stream read/write control triggering. According to the main software flow, inserting registers in the combinatorial logic delays the logic and implements FPGA timing control. The time-sharing operation method is used to control the read/write mode of the controller in the command layer, so as to realize the control and transmission of the transmission layer completion frame. It can be seen from the experimental results that the highest control efficiency of the module is superior to the traditional module, which provides support for efficient data storage.