北斗系统伪随机码的硬件仿真与演化设计

Hardware Simulation and Design of EHW for BDS’ Pseudo-random Noise Code

摘要:

作为国家战略空间基础设施,北斗卫星导航系统(BeiDou Navigation Satellite System,BDS)可以提供民用的标准定位服务和军用的精确定位服务,对我国的国防和经济建设意义重大。为研究BDS信号的产生机理和导航服务技术,在介绍伪随机码基本原理及BDS的 CB1I 码和CB2I码产生方法的基础上,基于FPGA硬件对该码生成器进行了硬件仿真实现；通过定义11位寄存器用来描述11级移位寄存器各级的状态,以此为基础生成了m序列,并最终生成了CB1I 码和CB2I码；通过Modelsim软件进行了仿真实验,下载至FPGA进行了硬件实现实验,验证了该生成电路能准确得到目的CB1I 码和CB2I码。设计了基于Nios II 和虚拟可重构(Virtual reconfigurable circuits,VRC)阵列的演化电路来实现该电路的方法,以可编程逻辑器件实现码生成电路,有助于对空间中BDS码生成器的抗干扰能力和自修复能力的研究。

Abstract:

As a national strategic space infrastructure, BDS (BeiDou Navigation Satellite System) can provide civil standard positioning service and military precise positioning service. It is significant to the national defense and economic construction of our country. For studying the mechanism of BDS signal and the technology of navigation service, this paper introduced the basal theory of pseudo-random code and the generation method of BDS’ CB1I code andCB2I code generation method. Then it accomplished hardware simulation experiment of the code based on FPGA. Defined the 11 register in order to describe the state of 11 levels shift register, on this basis, generated the m sequence, and finally generated the CB1I code andCB2I code. Accomplished simulation experiment by Modelsim software, accomplished hardware implementation experiment by downloading to the FPGA. That verifies the circuit is feasible to generate the CB1I code andCB2I code. This paper designed the circuit of evolution based Nios II and VRC array to realize target circuit. This study of the code generation circuit based on programmable logic devices will contribute to the research on anti-interference ability and self-repairing ability of BDS’ code generation circuit in space.