基于FPGA的信号微小延时方法

Tiny Delay Method for Signals Based on FPGA

摘要:

针对FPGA输入输出信号微小延时的需求,根据FPGA的I/O特性和I/O逻辑资源,研究了一种基于FPGA的信号微小延时方法;采用FPGA的输入输出延时单元IODELAY,实现对输入输出信号的绝对延时,能够确保对FPGA的输入输出信号进行最小78ps的延时;根据实际需要可以通过参数选择实现对输入信号的固定延时和可变延时工作模式,以及对输出信号的固定延时工作模式;实际应用表明,文中实现的信号延时方法能够精确实现信号微小延时,延时效果稳定,受温度等外界环境变化影响较小,能够满足工程项目中对信号微小延时的实际需要。

Abstract:

To fulfill the needs for the tiny delay of FPGA input/output signals, a FPGA based signal tiny delay method is provided depends on the analysis of FPGA I/O features and I/O logic sources. The IODELAY element is used to achieve the absolute delay of the input and output signals, and the minimal delay pace is 78 ps. Parameters are used to change delay modes. Fixed delay mode and variable delay mode are available for input signals. As for output signals, only fixed delay mode is valid. The application shows that the delay method provided in this paper is of high accuracy and stability, and hardly affected by circumstance such as temperature. 