基于AXI总线的视频数据传输处理的FPGA实现

Implementation of video data transmission and processing with FPGA based on AXI Bus

摘要:

为了保证铁路视频监控系统实时性,提高视频数据的传输和处理速度,提出了基于AXI总线的视频数据传输处理的FPGA实现,将XSVI(XILINX Streaming Video Interface)视频格式滤除扫描信号,只处理数据,在数据处理传输结束后,通过视频时间控制器产生扫描信号,和视频数据时序对应后输出。XSVI和AXI的转换接口控制器在modelsim软件上实现功能仿真,在ISE软件上实现综合与应用,并在Sparten6开发板上得到验证。

Abstract:

In order to ensure real-time monitoring systen of the railway, improve the transmission and processing speed ,a implementation is proposed,which is used to transmit and process video data with AXI bus.The method filters scan signals in XSVI (XILINX Streaming Video Interface) video formats, only processes data. After the transmission and processing of the data, video time controller generates scan signals, which output together with video data.The controller of XSVI and AXI interface is functional simulation on modelsim, is synthesized and applied on ISE and proved on Kintex7 development board.