基于FPGA单指令浮点乘法自主控制器设计

Design of Floating Point Multiplication Controller of Independent Control Based on FPGA

摘要:

为实现一种多浮点操作数乘法运算的自主运算控制器,提出了一种基于FPGA并行操作的硬连接电路的多浮点数乘法运算控制器及其时序控制的方法,该控制器对一条多浮点操作数乘法运算指令的命令字和多浮点操作数连续写入并存储,在内部时序脉冲作用下,可以自主完成读出浮点操作数执行乘法运算,写入存储多浮点操作数过程与执行乘法运算命令的过程能够并行进行；在控制器执行乘法运算命令过程中,系统可以读出执行命令过程中的中间结果和最终运算结果；论述了该控制器的电路构成和基本原理,分析命令字与多操作数在内部时序脉冲作用下的执行过程,应用Verilog HDL语言实现相关硬件的构建和连接；设计完成后通过仿真测试可知,该控制器运行的最高频率为250 MHz,从输入到输出端口最小延时是3.185 ns,最大延时是15.336 ns,且能够自主完成浮点数乘法运算。

Abstract:

In order to achieve an autonomic computing controller of multiplication of multiple floating-point operands , this paper proposes a multiple floating-point number multiplication operation controller of hard-wired circuit of a parallel operation based on the FPGA and the sequential control method. The command of a floating-point operation number multiplication instructions and multiple floating-point operands is writed, and stored into the controller in a row, and the controller can independently finish reading floating-point operands perform multiplication under the influence of internal timing pulse, the procession of writing and storing much floating-point operation and execution of commands can be parallel to the process of multiplication; In the process of controller performing multiplication command, the system can read the intermediate results in the process of executing commands and the final result. Discusses the circuit of the controller structure and basic principle, analyzes the Command word and multioperand in internal temporal pulse under execution of the action. VerilogHDL language is applied to implement the building and related hardware connection. After the completion of the design the simulation test shows that the controller can run the highest frequency of 250 MHz, from input to output port minimum delay is 3.185 ns, maximum delay is 15.336 ns, and can independently complete the floating-point multiplication.