Abstract:Radar target jamming modulation signal is designed by VHDL language under the environment of Quartus Ⅱ.The function of FPGA is divided into three units with the detailed design process, including digital noise unit, modulation waveform unit, angle envelope unit. Through the simulation and hardware test, radar target jamming modulation signal is generated successfully, research shows that the system is convenient to control, easy to modify, and can be transplanted to other target simulator, it also has certain reference significance to the design of the jamming modulation signal.